title	ADDA
	subttl	Module from library C_1 : ADDA
	maclib	SYSEQU.LIB

; FILE:	ADDA.MAC
; DATE: 820818:1310
; FOR:	A + HL -> HL

; ENTRY	: Reg HL holds 16 bit value
;	  Accu holds 8 bit value to be added
; EXIT	: Reg HL holds fixed 16 bit value

	entry	adda

adda:
	add	a,l		; Add low
	ld	l,a
	ret	nc
	inc	h		; .. fix hi
	ret

	end