$title ('CONFIGURATION module of SDT-351 v1.0')
$subtitle ('Identification Section')

/***************************************************************
*  TITLE:      Configuration                                   
*                                                              
*  DATE:       December 13, 1982                               
*                                                              
*  ABSTRACT:   This is the configuration module for the        
*              iSBX-351 System Test for SDTMON.  This module   
*              has been designed to facilitate the porting     
*              of diagnostic software from GPCP support to     
*              SDTMON.                                         
*
*				Additional user-supplied tests may be added to
*				sdt-351 by filling in the appropriate header
*				block in the test$def$block and linking the new
*				test modules to sdt-351.
*
*				The default parameters given in the LITERAL
*				constants section are all reconfigurable to
*				meet specific installation environments (unless
*				otherwise noted).  Default values for the J3
*				and J4 iSBX connectors of the iSBC 86/30 cpu
*				board have been provided.
*                                                              
*  LANGUAGE DEPENDENCIES:                                      
*                                                              
*       PLM/86		[sdt351cnf.p86]
*                                                              
***************************************************************/


/*****************************************************************************\
*                                                                             *
*                    Copyright Intel Corporation 1982, 1983                   *
*  All rights reserved.  No part of this program or publication may be        *
*  reproduced, transmitted, transcribed, stored in a retrieval system, or     *
*  translated into any language or computer language, in any form or by any   *
*  means, electronic, mechanical, magnetic, optical, chemical, manual or      *
*  otherwise, without the prior written permission of Intel Corporation,      *
*  3065 Bowers Avenue, Santa Clara, California, 95051, Attention:  Software   *
*  License Administration.                                                    *
*                                                                             *
\*****************************************************************************/
 
Configuration: DO;

$subtitle('Data Declaration Section')
/***************************************************************
*                                                              *
*     Data Declarations Section                                *
*                                                              *
***************************************************************/


/***** Generic literals *****/

DECLARE
  boolean                  LITERALLY 'BYTE',
  cr                       LITERALLY '0Dh',
  lf                       LITERALLY '0Ah',
  null                     LITERALLY '0',

  true                     LITERALLY '0FFH',
  false                    LITERALLY '0',
  pass                     LITERALLY '0FFH',
  fail                     LITERALLY '0',

/***** GPCP oriented literals *****/


/***** SDTMON oriented literals *****/

  hexform                  LITERALLY '0C3h';

  DECLARE
    IGN                    LITERALLY '1',
    REC                    LITERALLY '0';

  DECLARE
    error                  boolean EXTERNAL;

$subtitle ('SDT-351 Test Definition Configuration Section')
/***************************************************************
*                                                              
*     SDT-351 Test Definition Configuration Section            
*
*		Additional user-supplied tests may be entered here.
*			1) increment num$ts
*			2) fill in test$def$block DATA
*			3) supply test description message
*			4) supply procedure external and $br description
*			5) link new test modules to sdt-351
*
***************************************************************/


  DECLARE

    num$ts                 LITERALLY ' 6',   /* Total number of optional     */
                                             /* and mandatory tests          */

    test$def$block (num$ts)STRUCTURE (
                             flag     BYTE,    /* RECoginze / IGNore test     */
                             addr     POINTER, /* Address of the test         */
                             name$ptr POINTER  /* Address of test description */
                         ) PUBLIC
                            
                      DATA ( REC, @sq$pit_init$br,   @sq$pit_init$desc,
                             REC, @sq$u_init$br,     @sq$u_init$desc,
                             REC, @sq$u_intrv$br,    @sq$u_intrv$desc,
                             REC, @sq$baudrtv$br,    @sq$baudrtv$desc,
                             IGN, @sq$u_chtx$br,     @sq$u_chtx$desc,
                             IGN, @sq$u_chrx$br,     @sq$u_chrx$desc  );

$EJECT
/***************************************************************
*                                                              *
*     Sign-on Message and Subtest Titles                       *
*                                                              *
***************************************************************/


  DECLARE
    user$signon         (*)BYTE PUBLIC DATA(
'SYSTEM DIAGNOSTIC TEST - 351, V1.0',cr,lf,
'COPYRIGHT 1983 INTEL CORPORATION',cr,lf,null);

  DECLARE
    sq$pit_init$desc    (*)BYTE DATA( ' PIT   INITIALIZATION TEST  ',null),
    sq$u_init$desc      (*)BYTE DATA( ' USART INITIALIZATION TEST  ',null),
    sq$u_intrv$desc     (*)BYTE DATA( ' USART INTERRUPTS TEST      ',null),
    sq$baudrtv$desc     (*)BYTE DATA( ' BAUD RATE VERIFICATION TEST',null),
    sq$u_chtx$desc      (*)BYTE DATA( ' CHARACTER TRANSMITTER TEST ',null),
    sq$u_chrx$desc      (*)BYTE DATA( ' CHARACTER RECEIVER TEST    ',null);


/***************************************************************
*                                                              *
*     Mandatory Subroutines                                    *
*                                                              *
***************************************************************/


Initialize$GPCP$flags:                       /* Initialize GPCP variables    */
  PROCEDURE EXTERNAL;                        /* not normally used in SDTMON  */
  END Initialize$GPCP$flags;

$EJECT
/***************************************************************
*                                                              *
*     Mandatory Tests                                          *
*                                                              *
***************************************************************/


sq$pit_init:                  /* PIT INITALIZATION TEST       */
  PROCEDURE EXTERNAL;
  END sq$pit_init;

sq$pit_init$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$pit_init;
    RETURN NOT error;
  END sq$pit_init$br;

sq$u_init:                     /* USART INITIALIZATION TEST    */
  PROCEDURE EXTERNAL;
  END sq$u_init;

sq$u_init$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$u_init;
    RETURN NOT error;
  END sq$u_init$br;

sq$u_intrv:                    /* USART INTERRUPTS VERIFY TEST */
  PROCEDURE EXTERNAL;
  END sq$u_intrv;

sq$u_intrv$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$u_intrv;
    RETURN NOT error;
  END sq$u_intrv$br;

sq$baudrtv:                   /* BAUD RATE VERIFICATION TEST  */
  PROCEDURE EXTERNAL;
  END sq$baudrtv;

sq$baudrtv$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$baudrtv;
    RETURN NOT error;
  END sq$baudrtv$br;

$EJECT
/***************************************************************
*                                                              *
*     Optional Tests                                           *
*                                                              *
***************************************************************/

sq$u_chtx:                      /* CHARACTER TRANSMITTER TEST   */
  PROCEDURE EXTERNAL;
  END sq$u_chtx;

sq$u_chtx$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$u_chtx;
    RETURN NOT error;
  END sq$u_chtx$br;

sq$u_chrx:                      /* CHARACTER RECEIVER TEST      */
  PROCEDURE EXTERNAL;
  END sq$u_chrx;

sq$u_chrx$br:
  PROCEDURE boolean PUBLIC;
    CALL Initialize$GPCP$flags;
    CALL sq$u_chrx;
    RETURN NOT error;
  END sq$u_chrx$br;


$subtitle ('Installation-Specific Configurable Defaults')
/***************************************************************
*                                                              
*     Board-Specific Configuration Information                 
*
*			Defaults given here are for a normal iSBC 86/30
*			with interrupts not configured.
*
*			Installation-specific variations from these defaults
*			may be reconfigured here so that the tests will
*			automatically default to your specific configuration
*
***************************************************************/


  DECLARE
	/*
	 *  size of scratch area provided for user's future use
	 */
   scratch                LITERALLY '6000h',

	/*
     *  which isbx connector to default
     *  to in tests?
     */
	isbx_conn_select	   LITERALLY '0',	/* [0..1]  J3=0, J4=1	*/
	
	/***
	 *** INITIALIZATION DEFAULTS
	 *** for isbx0 (J3)
	 *** and isbx1 (J4)
	 ***/

	/*
	 * timers 0 & 1 cascaded ?
	 */
	 
	isbx0$timers_cascaded	LITERALLY 'false',
	isbx1$timers_cascaded   LITERALLY 'false',
	
	/*
	 *  init timer for mode 3, 2 byte count, no timer # specified
	 */
	 
	isbx0$u_tim_mode		LITERALLY '036h',		/* J3 */ 
	isbx1$u_tim_mode		LITERALLY '036h',		/* J4 */

	/*
	 * specify baud rate for each isbx using the index below:
	 *  0=   75 baud
	 *  1=  110 baud
	 *  2=  150 baud
	 *  3=  300 baud
	 *  4=  600 baud
	 *  5= 1200 baud
	 *  6= 2400 baud
	 *  7= 4800 baud
	 *  8= 9600 baud
	 *  9=19200 baud
	 */

	isbx0$user_baud_index	LITERALLY '8',		/*  J3  */
	isbx1$user_baud_index   LITERALLY '8',		/*  J4  */
		
	/*
	 * specify usart mode using the index below:
	 * 0= async mode, 1.0 stop bits
	 * 1= async mode, 1.5 stop bits
	 * 2= async mode, 2.0 stop bits
	 */

	isbx0$user_mode_index	LITERALLY '0',		/*  J3  */
	isbx1$user_mode_index	LITERALLY '0',		/*  J4  */
	

	/*
	 * specify character length using the index below
	 * 0= 5 bits
	 * 1= 6 bits
	 * 2= 7 bits
	 * 3= 8 bits
	 */

	isbx0$char_length_index	LITERALLY '3',			/* J3 */
	isbx1$char_length_index LITERALLY '3',			/* J4 */

	/*
	 * specify parity using the index below
	 * 0= parity disabled
	 * 1= parity odd
	 * 2= parity even
	 */

	isbx0$parity_index		LITERALLY '0',			/* J3 */
	isbx1$parity_index		LITERALLY '0',			/* J4 */

	/*
	 * specify usart command using the index below
	 * 0= tx disabled, rx disabled
	 * 1= tx enabled,  rx disabled
	 * 2= tx disabled, rx enabled
	 * 3= tx enabled,  rx enabled
	 */

	isbx0$command_index		LITERALLY '3',			/* J3 */
	isbx1$command_index		LITERALLY '3',			/* J4 */

	/*
	 * isbx port addresses
	 * included here in case of change in isbx bus 
	 * address utilization.
	 *
	 *    *******************************************************
	 *    *!*!* 	NOTE, the addressing in the isbx-351 	*!*!*
	 *    *!*!* 	manual is not correct for an iSBC 86/30 *!*!*
	 *    *!*!* 	cpu board                            	*!*!*
	 *    *******************************************************
	 */
	 
	isbx0$ceb_USART_data	LITERALLY '0A0h',		/* J3 */
	isbx1$ceb_USART_data	LITERALLY '080H' ,		/* J4 */

	isbx0$ceb_USART_cntr	LITERALLY '0A2h',		/* J3 */
	isbx1$ceb_USART_cntr	LITERALLY '082h',		/* J4 */

	isbx0$ceb_tim0_data		LITERALLY '0B0h',		/* J3 */
	isbx0$ceb_tim1_data		LITERALLY '0B2h',		/* J3 */
	isbx0$ceb_tim2_data		LITERALLY '0B4h',		/* J3 */
	isbx0$ceb_PIT_cntr		LITERALLY '0B6h',		/* J3 */
	
	isbx1$ceb_tim0_data		LITERALLY '090h',		/* J4 */
	isbx1$ceb_tim1_data		LITERALLY '092h',		/* J4 */
	isbx1$ceb_tim2_data		LITERALLY '094h',		/* J4 */
	isbx1$ceb_PIT_cntr		LITERALLY '096h',		/* J4 */

	/*
	 * CPU INTERRUPTS
	 * send interrupt levels as referred to by the CPU PIC
	 * (a value > 07 means that the interrupt is not connected)
	 */
	 
	isbx0$send_intr_tx		LITERALLY '3',	 		/* J3 */
	isbx0$send_intr_rx      LITERALLY '3',			/* J3 */

	isbx1$send_intr_tx		LITERALLY '3',			/* J4 */
	isbx1$send_intr_rx		LITERALLY '3',			/* J4 */

	/* 
	 * LOOPBACK CONNECTORS
	 * required for all receive testing except 
	 * for character receiver test (which requires user to inspect
	 * displayed chars visually)
	 */

	isbx0$loopback_conn	    LITERALLY 'FALSE',		/* J3 */
	isbx1$loopback_conn		LITERALLY 'FALSE',		/* J4 */

 	/*
 	 * USART TIMER CLOCK FREQUENCY SELECT
 	 * 0=153.6 KHz
 	 * 1=1.23  MHz
 	 * 2=2.46  MHz
 	 * (factory jumpered to 1.23 MHz)
 	 */

 	 isbx0$clock_freq		LITERALLY '01h',		/* J3 */
 	 isbx1$clock_freq		LITERALLY '01h',		/* J4 */
 	 	

	/*
	 * USART BAUD RATE TIMER SELECT
	 * timers 0..2 on PIT are available via jumpers,
	 * timer #2 is factory wired default
	 */

	isbx0$baud_timer		LITERALLY '02h',		/* J3 */
	isbx1$baud_timer		LITERALLY '02h',		/* J4 */

	/*
	 * FAIL / SAFE CPU TIMER 
	 * used in all tests
	 * values here refer to a timer on the host CPU board
	 */
	 						
	Sys_clk_freq			LITERALLY '1',		/* Onboard timer frequency:  */
												/*   0 = 153.6 KHz			 */
												/*   1 = 1.23  MHz			 */
												/*   2 = 2.46  MHz			 */

	Sys_timer				LITERALLY '0',		/* Onboard timer to be used  */
												/*   for the fail/safe timer */

	Sys_timer_intr			LITERALLY '2',		/* Interrupt connected to	 */
												/*   timer specified in 	 */
												/*   cpu_timer				 */

	Sys_base_port			LITERALLY '0C0h';	/* System processor board    */
												/*   base port				 */




$subtitle ('NON-CONFIGURABLE DATA AREA')
/***********************************************************
*                                                          
*     Non-Configurable Data Area                           
*                                                          
***********************************************************/


  DECLARE
    user$tdt       		(num$ts)	STRUCTURE (
    	flag							BYTE,
        overlay							BYTE,
        addr							POINTER,
        name$ptr						POINTER,
        err$cnt							WORD,
        exec$cnt						WORD )   PUBLIC,

    user$number$of$tests   			WORD PUBLIC DATA(num$ts);

  DECLARE
  	/*
  	 * reserved scratch area for user's use
  	 */
    user$scratch  		(scratch)	BYTE PUBLIC,
    user$scratch$size      			WORD PUBLIC DATA (scratch);

  DECLARE
	/***
	 *** $INIT VARIABLES
	 *** these will be copied up into RAM
	 *** by procedure INITIALIZE_SDT
	 *** most of them are reconfigurable at run-time
	 *** by user$reset$software and user$reset$hardware
	 ***/

  	pq$port$init 			(2) 	STRUCTURE (
  		USART_data	  					BYTE,
  		USART_cntr    					BYTE,
  	    tim_data 			(3)			BYTE,
  	    PIT_cntr      					BYTE,
  	    tx_intr_level   				BYTE,
  	    rx_intr_level   				BYTE  ) PUBLIC 

		DATA (
			isbx0$ceb_USART_data,			/* J3 DATA */
			isbx0$ceb_USART_cntr,
			isbx0$ceb_tim0_data,
			isbx0$ceb_tim1_data,
			isbx0$ceb_tim2_data,
			isbx0$ceb_PIT_cntr,
			isbx0$send_intr_tx,
			isbx0$send_intr_rx,

			isbx1$ceb_USART_data,          /* J4 DATA */
			isbx1$ceb_USART_cntr,
			isbx1$ceb_tim0_data,
			isbx1$ceb_tim1_data,
			isbx1$ceb_tim2_data,
			isbx1$ceb_PIT_cntr,
			isbx1$send_intr_tx,
			isbx1$send_intr_rx   ),
			
	pq$control$init 		(2) 	STRUCTURE (
		clock_freq						BYTE,
		baud_timer						BYTE,
		u_tim_mode						BYTE,
		baud_count      				WORD,
		u_mode							BYTE,
		u_comm							BYTE	) PUBLIC;

		
  DECLARE
  	pq$isbx$init  					BYTE PUBLIC DATA (
  			isbx_conn_select),

  	pq$timers_cascaded$init (2) 	BYTE PUBLIC DATA (
  			isbx0$timers_cascaded,
  			isbx1$timers_cascaded ),

	pq$user_baud_rate$init	(2)		BYTE PUBLIC DATA (
			isbx0$user_baud_index,
			isbx1$user_baud_index ),
			
    pq$loopback_conn$init 	(2)  	BYTE PUBLIC DATA (
    		isbx0$loopback_conn,
    		isbx1$loopback_conn ),

    pq$sys_clk_freq$init			BYTE PUBLIC DATA (
    		Sys_clk_freq ),

    pq$sys_timer$init				BYTE PUBLIC DATA (
    		Sys_timer ),	

    pq$sys_timer_intr$init			BYTE PUBLIC DATA (
    		Sys_timer_intr ),

    pq$sys_base_port$init			BYTE PUBLIC DATA (
    		Sys_base_port );
    		
$subtitle('sdtcnf$pq$control$init ')
/*****************************************************************
 *
 *	TITLE:		sdtcnf$pq$control$init
 *
 *	CALLING SEQUENCE:
 *
 *		CALL	sdtcnf$pq$control$init	
 *
 *	INTERFACE VARIABLES:
 * 		pq$control$init
 *
 *	ABSTRACT:
 *		This configuration procedure is required to support user-
 *		variations to iSBX-351 onboard clock and timer jumpers.
 *
 *		This procedure is called only by the mainline and only 
 *		immediately before calling Initialize$SDT.
 *
 *		Uses isbx?_user_ literals from above to generate usart mode
 *		bytes.  Initializes all fields of pq$control$init for each
 *		iSBX connector on the iSBC 86/30 cpu board.
 *
 *****************************************************************/

sdtcnf$pq$control$init:	procedure  reentrant public;


/*
 *
 *  INITIALIZE PQ$CONTROL$INIT ( J3 )
 *
 */
 
pq$control$init(0).clock_freq = isbx0$clock_freq;
pq$control$init(0).baud_timer = isbx0$baud_timer;
pq$control$init(0).u_tim_mode = isbx0$u_tim_mode;
pq$control$init(0).baud_count = 0;

pq$control$init(0).u_mode = 0;

do CASE isbx0$user_mode_index;

	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0100$0010B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 1000$0010B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 1100$0010B;
	end;

do CASE isbx0$char_length_index;

	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0000B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0100B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$1000B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$1100B;
	end;

do CASE isbx0$parity_index;

	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0000$0000B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0001$0000B;
	pq$control$init(0).u_mode = pq$control$init(0).u_mode OR 0011$0000B;
	end;

pq$control$init(0).u_comm     = 0011$0010B;
do CASE isbx0$command_index;

	pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0000B;
	pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0001B;
	pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0100B;
	pq$control$init(0).u_comm = pq$control$init(0).u_comm OR 0000$0101B;
	end;
	
/*
 *
 *  INITIALIZE PQ$CONTROL$INIT ( J4 )
 *
 */
 
pq$control$init(1).clock_freq = isbx1$clock_freq;
pq$control$init(1).baud_timer = isbx1$baud_timer;
pq$control$init(1).u_tim_mode = isbx1$u_tim_mode;
pq$control$init(1).baud_count = 0;

pq$control$init(1).u_mode = 0;

do CASE isbx1$user_mode_index;

	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0100$0010B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 1000$0010B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 1100$0010B;
	end;

do CASE isbx1$char_length_index;

	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0000B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0100B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$1000B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$1100B;
	end;

do CASE isbx1$parity_index;

	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0000$0000B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0001$0000B;
	pq$control$init(1).u_mode = pq$control$init(1).u_mode OR 0011$0000B;
	end;

pq$control$init(1).u_comm     = 0011$0010B;
do CASE isbx1$command_index;

	pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0000B;
	pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0001B;
	pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0100B;
	pq$control$init(1).u_comm = pq$control$init(1).u_comm OR 0000$0101B;
	end;
	
end sdtcnf$pq$control$init;
	
	

END Configuration;