PAL20X8 PAL DESIGN SPECIFICATION P7087 (PMSI403) VINCENT COLI 06/21/82 2-DIGIT BCD COUNTER MMI SUNNYVALE, CALIFORNIA CLK /CE1 D1A D1B D1C D1D D2A D2B D2C D2D /LD GND /OC /CO Q2D Q2C Q2B Q2A Q1D Q1C Q1B Q1A CE2 VCC /Q1A := /LD*/Q1A ;HOLD FIRST BIT OF 1 DECIMAL + LD*/D1A ;LOAD D1A :+: /LD* CE1* CE2 ;COUNT /Q1B := /LD*/Q1B ;HOLD SECOND BIT OF 1 DECIMAL + LD*/D1B ;LOAD D1B :+: /LD* CE1* CE2* Q1A*/Q1D ;COUNT /Q1C := /LD*/Q1C ;HOLD THIRD BIT OF 1 DECIMAL + LD*/D1C ;LOAD D1C :+: /LD* CE1* CE2* Q1A* Q1B ;COUNT /Q1D := /LD*/Q1D ;HOLD FOURTH BIT OF 1 DECIMAL + LD*/D1D ;LOAD D1D :+: /LD* CE1* Q1A* Q1B* Q1C ;COUNT + /LD* CE1* CE2* Q1A* Q1D ;ROLL OVER /Q2A := /LD*/Q2A ;HOLD FIRST BIT OF 10 DECIMAL + LD*/D2A ;LOAD D2A :+: /LD* CE1* CE2* Q1A* Q1D ;COUNT /Q2B := /LD*/Q2B ;HOLD SECOND BIT OF 10 DECIMAL + LD*/D2B ;LOAD D2B :+: /LD* CE1* CE2* Q1A* Q1D* Q2A*/Q2D ;COUNT /Q2C := /LD*/Q2C ;HOLD THIRD BIT OF 10 DECIMAL + LD*/D2C ;LOAD D2C :+: /LD* CE1* CE2* Q1A* Q1D* Q2A* Q2B ;COUNT /Q2D := /LD*/Q2D ;HOLD FOURTH BIT OF 10 DECIMAL + LD*/D2D ;LOAD D2D :+: /LD* CE1* CE2* Q1A* Q1D* Q2A* Q2B* Q2C ;COUNT + /LD* CE1* CE2* Q1A* Q1D* Q2A* Q2D ;ROLL OVER IF (VCC) CO = Q1A* Q1D* Q2A* Q2D ;CARRY OUT (10 DECIMAL) FUNCTION TABLE CLK /OC /LD /CE1 CE2 D2D D2C D2B D2A D1D D1C D1B D1A /CO Q2D Q2C Q2B Q2A Q1D Q1C Q1B Q1A ; CHIP --INPUTS--- --OUTPUTS-- ;CONTROL INSTRUCTIONS BCD 2 BCD 1 BCD 2 BCD 1 COMMENT ;CLK /OC /LD /CE1 CE2 DCBA DCBA /CO DCBA DCBA (DECIMAL VALUE) ------------------------------------------------------------------------------- C L L L H LLLL LLLL H LLLL LLLL LOAD (00) /LD=L C L H H H XXXX XXXX H LLLL LLLL HOLD (00)/CE1=H C L H L H XXXX XXXX H LLLL LLLH COUNT (01) C L H L H XXXX XXXX H LLLL LLHL COUNT (02) C L H L H XXXX XXXX H LLLL LLHH COUNT (03) C L H L H XXXX XXXX H LLLL LHLL COUNT (04) C L H L H XXXX XXXX H LLLL LHLH COUNT (05) C L H L H XXXX XXXX H LLLL LHHL COUNT (06) C L H L H XXXX XXXX H LLLL LHHH COUNT (07) C L H L H XXXX XXXX H LLLL HLLL COUNT (08) C L H L H XXXX XXXX H LLLL HLLH COUNT (09) C L H L H XXXX XXXX H LLLH LLLL COUNT (10) C L H L H XXXX XXXX H LLLH LLLH COUNT (11) C L L H L LLLH HLLH H LLLH HLLH LOAD (19) C L H L H XXXX XXXX H LLHL LLLL COUNT (20) C L L H L LLHL HLLH H LLHL HLLH LOAD (29) C L H L H XXXX XXXX H LLHH LLLL COUNT (30) C L L H L LLHH HLLH H LLHH HLLH LOAD (39) C L H L H XXXX XXXX H LHLL LLLL COUNT (40) C L L H L LHLL HLLH H LHLL HLLH LOAD (49) C L H L H XXXX XXXX H LHLH LLLL COUNT (50) C L L H L LHLH HLLH H LHLH HLLH LOAD (59) C L H L H XXXX XXXX H LHHL LLLL COUNT (60) C L L H L LHHL HLLH H LHHL HLLH LOAD (69) C L H L H XXXX XXXX H LHHH LLLL COUNT (70) C L L H L LHHH HLLH H LHHH HLLH LOAD (79) C L H L H XXXX XXXX H HLLL LLLL COUNT (80) C L L H L HLLL HLLH H HLLL HLLH LOAD (89) C L H L H XXXX XXXX H HLLH LLLL COUNT (90) C L L H L HLLH HLLH L HLLH HLLH LOAD (99) /CO=L C L H L H XXXX XXXX H LLLL LLLL COUNT (00) C L H L L XXXX XXXX H LLLL LLLL HOLD (00) CE2=L X H X X X XXXX XXXX X ZZZZ ZZZZ TEST HI-Z ------------------------------------------------------------------------------- DESCRIPTION THE 2-DIGIT BCD (BINARY CODED DECIMAL) SYNCHRONOUS COUNTER WITH COMPLEMENTARY COUNT ENABLES, PARALLEL LOAD, AND CARRY OUT IS IMPLEMENTED IN A PAL20X8. THREE CONTROL INPUTS (/LD,/CE1,CE2) PROVIDE ONE OF THREE OPERATIONS WHICH OCCUR SYNCHRONOUSLY ON THE RISING EDGE OF THE CLOCK (CLK). THE COUNTER WILL INCREMENT IN A BINARY-CODED-DECIMAL SEQUENCE WHEN BOTH COUNT ENABLES ARE TRUE (/CE1=L AND CE2=H) AND LOAD IS FALSE (/LD=H). THE COUNTER WILL HOLD IF ONE COUNT ENABLE IS FALSE (/CE1=H OR CE2=L). THE LOAD OPERATION LOADS THE INPUTS (D1- AND D2-) INTO THE OUTPUT REGISTER (Q1- AND Q2-) WHEN LOAD IS TRUE (/LD=L). NOTE THAT LOAD OVERRIDES INCREMENT. TWO OR MORE BCD COUNTERS CAN BE CASCADED TO IMPLEMENT LARGER BCD COUNTERS BY CONNECTING CARRY OUT (/CO) OF THE FIRST STAGE TO COUNT ENABLE (/CE1) OF THE SECOND STAGE. THIS DESIGN IS IDEAL IN AN INDUSTRIAL CONTROL APPLICATION WHERE AN EVENT COUNTER IS NEEDED TO DRIVE NUMERIC DISPLAYS. THE PAL CAN RECEIVE ONE COUNT ENABLE IN THE FORM OF STROBES FROM A MOTOR OR OTHER DEVICE. THE SECOND COUNT ENABLE CAN RECEIVE THE PERIOD SIGNAL. THE PAL WILL PROVIDE TWO ACTIVE HIGH BCD OUTPUTS (Q1- AND Q2-) TO DRIVE TWO NUMERIC INDICATORS, SUCH AS THE HEWLETT PACKARD 5082-7300 WHICH FEATURES AN ON-BOARD DECODER/DRIVER AND LATCH ENABLE. PARALLEL LOADING IS PROVIDED FOR PAL AND NUMERIC INDICATOR TESTIBILITY, HOWEVER, /LD CAN BE CHANGED TO A CLEAR FUNCTION (/CLR) BY TYING THE BCD PARALLEL INPUTS (D1- AND D2-) TO GROUND (GND). THESE OPERATIONS ARE EXERCISED IN THE FUNCTION TABLE AND SUMMARIZED IN THE OPERATIONS TABLE: /OC CLK /LD /CE1 CE2 BCD-IN BCD-OUT OPERATION ----------------------------------------------------------- H X X X X X Z HI-Z L C L X X D D LOAD L C H H X X Q HOLD (/CE1=H) L C H X L X Q HOLD (CE2=L) L C H L H X Q PLUS 1 INCREMENT -----------------------------------------------------------