PAL20X8 PAL DESIGN SPECIFICATION P7075 MIKE VOLPIGNO 11/20/81 4-BIT COUNTER WITH REGISTER MONOLITHIC MEMORIES INC NEWTON, MASSACHUSETTS CLK D0 D1 D2 D3 /RCLR /RLD SEL /CCLR /CLD EP GND /OC RCO C3 C2 C1 C0 R3 R2 R1 R0 ET VCC /C0 := CCLR ;CLEAR COUNTER + /CLD*/CCLR* EP* ET ;COUNT :+: /CLD*/CCLR*/C0 ;COUNT + CLD*/CCLR*/R0 ;LOAD COUNTER FROM REGISTER /C1 := CCLR ;CLEAR COUNTER + /CLD*/CCLR* EP* ET* C0 ;COUNT :+: /CLD*/CCLR*/C1 ;COUNT + CLD*/CCLR*/R1 ;LOAD COUNTER FROM REGISTER /C2 := CCLR ;CLEAR COUNTER + /CLD*/CCLR* EP* ET* C0* C1 ;COUNT :+: /CLD*/CCLR*/C2 ;COUNT + CLD*/CCLR*/R2 ;LOAD COUNTEF FROM REGISTER /C3 := CCLR ;CLEAR COUNTER + /CLD*/CCLR* EP* ET* C0* C1* C2 ;COUNT :+: /CLD*/CCLR*/C3 ;COUNT + CLD*/CCLR*/R3 ;LOAD COUNTER FROM REGISTER /R0 := RCLR ;CLEAR REGISTER + /RCLR* RLD*/SEL*/D0 ;LOAD REGISTER FROM DATA :+: /RCLR* RLD* SEL*/C0 ;LOAD REGISTER FROM COUNTER + /RCLR*/RLD*/R0 ;HOLD /R1 := RCLR ;CLEAR REGISTER + /RCLR* RLD*/SEL*/D1 ;LOAD REGISTER FROM DATA :+: /RCLR* RLD* SEL*/C1 ;LOAD REGISTER FROM COUNTER + /RCLR*/RLD*/R1 ;HOLD /R2 := RCLR ;CLEAR REGISTER + /RCLR* RLD*/SEL*/D2 ;LOAD REGISTER FROM DATA :+: /RCLR* RLD* SEL*/C2 ;LOAD REGISTER FROM COUNTER + /RCLR*/RLD*/R2 ;HOLD /R3 := RCLR ;CLEAR REGISTER + /RCLR* RLD*/SEL*/D3 ;LOAD REGISTER FROM DATA :+: /RCLR* RLD* SEL*/C3 ;LOAD REGISTER FROM COUNTER + /RCLR*/RLD*/R3 ;HOLD IF(VCC) /RCO = ET* C0* C1* C2* C3 ;TERMINAL COUNT FUNCTION TABLE CLK /RCLR /RLD SEL /CCLR /CLD EP ET D3 D2 D1 D0 R3 R2 R1 R0 C3 C2 C1 C0 /RCO ; / / ; R / C / ; C C R S C C R ; L L L E L L E E D--D R--R C--C C ; K R D L R D P T 3 0 3 0 3 0 O COMMENTS -------------------------------------------------------------------- C L X X X X X X XXXX LLLL XXXX X CLEAR REGISTER C H L L X X X X HHHH HHHH XXXX X LOAD REGISTER HI FROM DATA C H H X H L X X XXXX HHHH HHHH X LOAD COUNTER FROM REGISTER C H H X H H L H XXXX HHHH HHHH H ENABLE RCO AND HOLD COUNT C H H X H H H H XXXX HHHH LLLL L COUNT AND ROLLOVER C H H X H H H H XXXX HHHH LLLH L INCREMENT COUNTER C H H X H H H H XXXX HHHH LLHL L " " C H H X H H H H XXXX HHHH LLHH L " " C H H X H H H H XXXX HHHH LHLL L " " C H H X H H H H XXXX HHHH LHLH L " " C H H X H H H H XXXX HHHH LHHL L " " C H H X H H H H XXXX HHHH LHHH L " " C H H X H H H H XXXX HHHH HLLL L " " C H H X H H H H XXXX HHHH HLLH L " " C H H X H H H H XXXX HHHH HLHL L " " C H H X H H H H XXXX HHHH HLHH L " " C H H X H H H H XXXX HHHH HHLL L " " C H H X H H H H XXXX HHHH HHLH L " " C H H X H H H H XXXX HHHH HHHL L " " C H L H H H H L XXXX HHHL HHHL L LOAD REGISTER FROM COUNTER C H H X L X X X XXXX HHHL LLLL L HOLD REGISTER, CLEAR COUNTER ---------------------------------------------------------------------- DESCRIPTION THIS PAL DESIGN SPECIFICATION DESCRIBES A 4-BIT SYNCHRONOUS COUNTER WITH 4-BIT REGISTER. DATA CAN BE LOADED TO THE COUNTER FROM THE REGISTER. IT CAN ALSO BE SYNCHRONOUSLY CLEARED. THE REGISTER CAN BE LOADED FROM EITHER THE COUNTER OR THE DATA INPUTS UNDER CONTROL OF THE SEL INPUT. THE REGISTER CAN ALSO BE SYNCHRONOUSLY CLEARED. THE COUNTER AND REGISTER HAVE A COMMON CLOCK FOR SYNCHRONOUS OPERATION.