PAL20L10 PAL DESIGN SPECIFICATION P7073 COLI/SACKETT 09/14/82 MC6800 MICROPROCESSOR INTERFACE MMI SUNNYVALE, CALIFORNIA A15 A14 A13 A12 A11 NC /S /R PH2 VMA /AR GND ENIN EN /IO /RAM4 /RAM3 /RAM2 /RAM1 /PROM2 /PROM1 /RESET VUA VCC IF(VCC) PROM1 = A15* A14* A13* A12 * VMA* PH2*/RESET ;PROM1, F000-FFFF IF(VCC) PROM2 = A15* A14* A13*/A12 * VMA* PH2*/RESET ;PROM2, E000-EFFF IF(VCC) RAM1 = /A15*/A14*/A13*/A12*/A11* VMA* PH2*/RESET ;RAM1, 0000-07FF IF(VCC) RAM2 = /A15*/A14*/A13*/A12* A11* VMA* PH2*/RESET ;RAM2, 0800-0FFF IF(VCC) RAM3 = /A15*/A14*/A13* A12*/A11* VMA* PH2*/RESET ;RAM3, 1000-17FF IF(VCC) RAM4 = /A15*/A14*/A13* A12* A11* VMA* PH2*/RESET ;RAM4, 1800-1FFF IF(VCC) IO = A15* A14*/A13* A12* A11* VMA* PH2*/RESET ;I/O, D800-DFFF IF(VCC) /EN = /PROM1*/PROM2*/RAM1*/RAM2*/RAM3*/RAM4*/IO* VMA*/RESET ;EN=/VUA IF(VCC) /VUA = ENIN ;ASSERTIVE HIGH VUA SIGNAL (INVERT EN FEEDBACK) IF(VCC) RESET = S ;SET + /R * RESET ;RESET + /AR* RESET ;AUTO RESET FUNCTION TABLE A15 A14 A13 A12 A11 /S /R /AR /RESET PH2 VMA /PROM1 /PROM2 /RAM1 /RAM2 /RAM3 /RAM4 /IO EN ENIN VUA ;ADDR1 S-R /RE PROM --RAM-- ENABLE ;54321 /S /R /AR SET PH2 VMA 1 2 1 2 3 4 I/O OUT IN VUA COMMENT ------------------------------------------------------------------------------- HHHHX L H L L L H H H H H H H H H H L RESET (/S=L) HHHHX H L H L L H H H H H H H H H H L AUTO-RESET HHHHX H L L H L H H H H H H H H L L H NO SELECT PH2=L HHHHX H L L H H L H H H H H H H H H L NO SELECT VMA=L HHHHX H L L H H H L H H H H H H H H L SELECT PROM1 HHHLX H L L H H H H L H H H H H H H L SELECT PROM2 LLLLL H L L H H H H H L H H H H H H L SELECT RAM1 LLLLH H L L H H H H H H L H H H H H L SELECT RAM2 LLLHL H L L H H H H H H H L H H H H L SELECT RAM3 LLLHH H L L H H H H H H H H L H H H L SELECT RAM4 HHLHH H L L H H H H H H H H H L H H L SELECT I/O PORT ------------------------------------------------------------------------------- DESCRIPTION THIS PAL20L10 INTERFACES BETWEEN THE MOTOROLA MC6800 MICROPROCESSOR AND ITS SYSTEM COMPONENTS ON A SINGLE BOARD COMPUTER. THE FUNCTIONS IT PERFORMS, PREVIOUSLY DONE WITH RANDOM LOGIC ARE: ADDRESS DECODING, MEMORY AND I/O SELECT, RESET SIGNAL GENERATION, AND CONTROL OF THE BUFFER WHICH INTERFACES THE DATA BUS TO OTHER BOARDS IN THE SYSTEM.