PAL20X10 PAL DESIGN SPECIFICATION P7072 (PMSI407) DANESH TAVANA 04/05/82 10-BIT ADDRESSABLE REGISTER MMI SUNNYVALE, CALIFORNIA CLK /CLR /PR A B C D E1 E2 /E3 DIN GND /OC Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 VCC /Q0 := CLR ;CLEAR (LSB) + /PR*/Q0 ;HOLD (/Q0) :+: /PR*/CLR* E1* E2* E3*/D*/C*/B*/A*/Q0* DIN ;LOAD ( DIN:+:/Q0) IF /Q0=H + /PR*/CLR* E1* E2* E3*/D*/C*/B*/A* Q0*/DIN ;LOAD (/DIN:+:/QO) IF /QO=L /Q1 := CLR ;CLEAR + /PR*/Q1 ;HOLD (/Q1) :+: /PR*/CLR* E1* E2* E3*/D*/C*/B* A*/Q1* DIN ;LOAD ( DIN:+:/Q1) IF /Q1=H + /PR*/CLR* E1* E2* E3*/D*/C*/B* A* Q1*/DIN ;LOAD (/DIN:+:/Q1) IF /Q1=L /Q2 := CLR ;CLEAR + /PR*/Q2 ;HOLD (/Q2) :+: /PR*/CLR* E1* E2* E3*/D*/C* B*/A*/Q2* DIN ;LOAD ( DIN:+:/Q2) IF /Q2=H + /PR*/CLR* E1* E2* E3*/D*/C* B*/A* Q2*/DIN ;LOAD (/DIN:+:/Q2) IF /Q2=L /Q3 := CLR ;CLEAR + /PR*/Q3 ;HOLD (/Q3) :+: /PR*/CLR* E1* E2* E3*/D*/C* B* A*/Q3* DIN ;LOAD ( DIN:+:/Q3) IF /Q3=H + /PR*/CLR* E1* E2* E3*/D*/C* B* A* Q3*/DIN ;LOAD (/DIN:+:/Q3) IF /Q3=L /Q4 := CLR ;CLEAR + /PR*/Q4 ;HOLD (/Q4) :+: /PR*/CLR* E1* E2* E3*/D* C*/B*/A*/Q4* DIN ;LOAD ( DIN:+:/Q4) IF /Q4=H + /PR*/CLR* E1* E2* E3*/D* C*/B*/A* Q4*/DIN ;LOAD (/DIN:+:/Q4) IF /Q4=L /Q5 := CLR ;CLEAR + /PR*/Q5 ;HOLD (/Q5) :+: /PR*/CLR* E1* E2* E3*/D* C*/B* A*/Q5* DIN ;LOAD ( DIN:+:/Q5) IF /Q5=H + /PR*/CLR* E1* E2* E3*/D* C*/B* A* Q5*/DIN ;LOAD (/DIN:+:/Q5) IF /Q5=L /Q6 := CLR ;CLEAR + /PR*/Q6 ;HOLD (/Q6) :+: /PR*/CLR* E1* E2* E3*/D* C* B*/A*/Q6* DIN ;LOAD ( DIN:+:/Q6) IF /Q6=H + /PR*/CLR* E1* E2* E3*/D* C* B*/A* Q6*/DIN ;LOAD (/DIN:+:/Q6) IF /Q6=L /Q7 := CLR ;CLEAR + /PR*/Q7 ;HOLD (/Q7) :+: /PR*/CLR* E1* E2* E3*/D* C* B* A*/Q7* DIN ;LOAD ( DIN:+:/Q7) IF /Q7=H + /PR*/CLR* E1* E2* E3*/D* C* B* A* Q7*/DIN ;LOAD (/DIN:+:/Q7) IF /Q7=L /Q8 := CLR ;CLEAR + /PR*/Q8 ;HOLD (/Q8) :+: /PR*/CLR* E1* E2* E3* D*/C*/B*/A*/Q8* DIN ;LOAD ( DIN:+:/Q8) IF /Q8=H + /PR*/CLR* E1* E2* E3* D*/C*/B*/A* Q8*/DIN ;LOAD (/DIN:+:/Q8) IF /Q8=L /Q9 := CLR ;CLEAR (MSB) + /PR*/Q9 ;HOLD (/Q9) :+: /PR*/CLR* E1* E2* E3* D*/C*/B* A*/Q9* DIN ;LOAD ( DIN:+:/Q9) IF /Q9=H + /PR*/CLR* E1* E2* E3* D*/C*/B* A* Q9*/DIN ;LOAD (/DIN:+:/Q9) IF /Q9=L FUNCTION TABLE /OC CLK /CLR /PR /E3 E2 E1 D C B A DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ; -----OUTPUTS------- ;CONTROL -----FUNCTIONS---- ---INPUTS-- Q Q Q Q Q Q Q Q Q Q ;/OC CLK /CLR /PR /E3 E2 E1 D C B A DIN 9 8 7 6 5 4 3 2 1 0 COMMENTS ------------------------------------------------------------------------------- L C L L X X X X X X X X L L L L L L L L L L /CLR OVRRD /PR L C H L X X X X X X X X H H H H H H H H H H /PR OVRRD ENABLE L C H H L H H L L L L L H H H H H H H H H L LOAD QO WITH DIN L C H H L H H L L L H L H H H H H H H H L L LOAD Q1 WITH DIN L C H H L H H L L H L L H H H H H H H L L L LOAD Q2 WITH DIN L C H H L H H L L H H L H H H H H H L L L L LOAD Q3 WITH DIN L C H H L H H L H L L L H H H H H L L L L L LOAD Q4 WITH DIN L C H H L H H L H L H L H H H H L L L L L L LOAD Q5 WITH DIN L C H H L H H L H H L L H H H L L L L L L L LOAD Q6 WITH DIN L C H H L H H L H H H L H H L L L L L L L L LOAD Q7 WITH DIN L C H H L H H H L L L L H L L L L L L L L L LOAD Q8 WITH DIN L C H H L H H H L L H L L L L L L L L L L L LOAD Q9 WITH DIN L C H H L H H H L L H H H L L L L L L L L L LOAD Q9 WITH DIN L C H H L H H H L L L H H H L L L L L L L L LOAD Q8 WITH DIN L C H H L H H L H H H H H H H L L L L L L L LOAD Q7 WITH DIN L C H H L H H L H H L H H H H H L L L L L L LOAD Q6 WITH DIN L C H H L H H L H L H H H H H H H L L L L L LOAD Q5 WITH DIN L C H H L H H L H L L H H H H H H H L L L L LOAD Q4 WITH DIN L C H H L H H L L H H H H H H H H H H L L L LOAD Q3 WITH DIN L C H H L H H L L H L H H H H H H H H H L L LOAD Q2 WITH DIN L C H H L H H L L L H H H H H H H H H H H L LOAD Q1 WITH DIN L C H H L H H L L L L H H H H H H H H H H H LOAD Q0 WITH DIN L C H H L L L X X X X X H H H H H H H H H H HOLD STATE L C H H L H H L L L L L H H H H H H H H H L LOAD Q0 WITH DIN L C H H L L H X X X X X H H H H H H H H H L HOLD STATE L C H H L H H L L H L L H H H H H H H L H L LOAD Q2 WITH DIN L C H H L H L X X X X X H H H H H H H L H L HOLD STATE L C H H L H H L H L L L H H H H H L H L H L LOAD Q4 WITH DIN L C H H H L L X X X X X H H H H H L H L H L HOLD STATE L C H H L H H L H H L L H H H L H L H L H L LOAD Q6 WITH DIN L C H H H L H X X X X X H H H L H L H L H L HOLD STATE L C H H L H H H L L L L H L H L H L H L H L LOAD Q8 WITH DIN L C H H H H H X X X X X H L H L H L H L H L HOLD STATE H X X X X X X X X X X X Z Z Z Z Z Z Z Z Z Z TEST HI-Z ------------------------------------------------------------------------------- DESCRIPTION THE 10-BIT ADDRESSABLE REGISTER IS A SYNCHRONOUS GENERAL PURPOSE ADDRESSABLE REGISTER WITH CLEAR, PRESET, AND ENABLE. THE OUTPUT REGISTER (Q) IS SELECTED BY THE INPUT ADDRESS PINS (A,B,C,D). THE DATA (DIN) IS LOADED INTO THE SELECTED OUTPUT REGISTER ON THE RISING EDGE OF THE CLOCK (CLK) IF THE CHIP IS ENABLED (E1=HIGH,E2=HIGH,/E3=LOW). ALL OTHER OUTPUTS HOLD THEIR PREVIOUS STATES DURING THE LOAD OPERATION. ANY OTHER COMBINATION OF THE ENABLE PINS (E1,E2,/E3) WILL DISABLE THE REGISTER AND ALL OUTPUTS WILL HOLD THEIR PREVIOUS STATES. CLEAR (/CLR) AND PRESET (/PR) ARE ACTIVE LOW PINS WHICH SET THE REGISTERS TO ALL HIGH OR LOW RESPECTIVELY. CLEAR OVERRIDES PRESET AND ENABLE, PRESET OVERRIDES ENABLE. THESE FUNCTIONS ARE EXERCISED IN THE FUNCTION TABLE AND SUMMARIZED IN THE OPERATIONS TABLE: /OC CLK /CLR /PR /E3 E2 E1 D C B A DIN Q9-Q0 OPERATION ------------------------------------------------------------------------------ H X X X X X X X X X X X Z HI-Z L C L L X X X X X X X X L CLEAR L C H L X X X X X X X X H PRESET L C H H L L L X X X X X Q HOLD PREVIOUS STATES L C H H L L H X X X X X Q HOLD PREVIOUS STATES L C H H L H L X X X X X Q HOLD PREVIOUS STATES L C H H L H H D C B A DIN DIN LOAD DIN TO ADDRESSED OUTPUT L C H H H L L X X X X X Q HOLD PREVIOUS STATES L C H H H L H X X X X X Q HOLD PREVIOUS STATES L C H H H H L X X X X X Q HOLD PREVIOUS STATES L C H H H H H X X X X X Q HOLD PREVIOUS STATES ------------------------------------------------------------------------------ OUTPUT SELECT TABLE D C B A DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 -------------------------------------------------------- L L L L DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 DIN L L L H DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 DIN Q0 L L H L DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 DIN Q1 Q0 L L H H DIN Q9 Q8 Q7 Q6 Q5 Q4 DIN Q2 Q1 Q0 L H L L DIN Q9 Q8 Q7 Q6 Q5 DIN Q3 Q2 Q1 Q0 L H L H DIN Q9 Q8 Q7 Q6 DIN Q4 Q3 Q2 Q1 Q0 L H H L DIN Q9 Q8 Q7 DIN Q5 Q4 Q3 Q2 Q1 Q0 L H H H DIN Q9 Q8 DIN Q6 Q5 Q4 Q3 Q2 Q1 Q0 H L L L DIN Q9 DIN Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 H L L H DIN DIN Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 H L H L DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 H L H H DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 H H X X DIN Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 --------------------------------------------------------