PAL20X8 PAL DESIGN SPECIFICATION P7044 NADIA SACHS 08/14/81 32-BIT CRC (CYCLICAL REDUNDANCY CHECKING) ERROR DETECTION, CHIP 4 MMI SUNNYVALE, CALIFORNIA CLK INIT C IN /Q23 NC NC NC /CHK1 /CHK2 /CHK3 GND /OC /OUT /Q31 /Q30 /Q29 /Q28 /Q27 /Q26 /Q25 /Q24 /CHECK VCC IF(VCC) CHECK = CHK1* CHK2* CHK3* Q24* Q25* Q26*/Q27 ;CHECK * /Q28*/Q29* Q30* Q31 ;ERROR Q24 := Q23 ;SHIFT + INIT ;INITIALIZE Q25 := Q24 ;SHIFT + INIT ;INITIALIZE Q26 := Q25 ;SHIFT + INIT ;INITIALIZE :+: /INIT* C* IN*/Q31 ;MODULO-2 + /INIT* C*/IN* Q31 ;ADDITION Q27 := Q26 ;SHIFT + INIT ;INITIALIZE Q28 := Q27 ;SHIFT + INIT ;INITIALIZE Q29 := Q28 ;SHIFT + INIT ;INITIALIZE Q30 := Q29 ;SHIFT + INIT ;INITIALIZE Q31 := Q30 ;SHIFT + INIT ;INITIALIZE IF(VCC) OUT = Q31*/C ;SERIAL + /IN * C ;OUT FUNCTION TABLE CLK /OC INIT C IN CHK1 CHK2 CHK3 Q23 Q31 Q30 Q29 Q28 Q27 Q26 Q25 Q24 OUT CHECK ; Q QQQQQQQQ ; CHK 2 33222222 ;CLK /OC INIT C IN 123 3 10987654 OUT CHECK -------------------------------------------------------------- C L H X L XXX X HHHHHHHH X X C L L H L XXX H HHHHHLHH H X C L L H L XXX L HHHHLLHL H X C L L H L XXX H HHHLLLLH H X C L L H L XXX H HHLLLHHH H X C L L H L XXX H HLLLHLHH H X C L L H L XXX H LLLHLLHH H X C L L H L XXX H LLHLLHHH H X C L L H L XXX L LHLLHHHL H X C L L H L XXX L HLLHHHLL H X C L L H L XXX L LLHHHHLL H X C L L H L XXX H LHHHHLLH H X C L L H L XXX H HHHHLLHH H X C L L H L XXX H HHHLLLHH H X C