PAL20X8                                              PAL DESIGN SPECIFICATION
P7041                                                    NADIA SACHS 08/14/81
32-BIT CRC (CYCLICAL REDUNDANCY CHECKING) ERROR DETECTION, CHIP 1
MMI SUNNYVALE, CALIFORNIA
CLK INIT C IN /Q31 NC NC NC NC NC NC GND
/OC NC /Q7 /Q6 /Q5 /Q4 /Q3 /Q2 /Q1 /Q0 /CHK1 VCC


IF(VCC) CHK1 =  Q0* Q1*/Q2* Q3* Q4* Q5* Q6*/Q7   ;CHECK BIT 1

Q0  :=   Q31* C                                  ;SHIFT IF C
     +   INIT                                    ;INITIALIZE
    :+: /INIT* IN* C                             ;MODULO-2
     +  /INIT* IN* C                             ;ADDITION

Q1  :=   Q0                                      ;SHIFT
     +   INIT                                    ;INITIALIZE
    :+: /INIT* C* IN*/Q31                        ;MODULO-2
     +  /INIT* C*/IN* Q31                        ;ADDITION

Q2  :=   Q1                                      ;SHIFT
     +   INIT                                    ;INITIALIZE
    :+: /INIT* C* IN*/Q31                        ;MODULO-2
     +  /INIT* C*/IN* Q31                        ;ADDITION

Q3  :=   Q2                                      ;SHIFT
     +   INIT                                    ;INITIALIZE

Q4  :=   Q3                                      ;SHIFT
     +   INIT                                    ;INITIALIZE
    :+: /INIT* C* IN*/Q31                        ;MODULO-2
     +  /INIT* C*/IN* Q31                        ;ADDITION

Q5  :=   Q4                                      ;SHIFT
     +   INIT                                    ;INITIALIZE
    :+: /INIT* C* IN*/Q31                        ;MODULO-2
     +  /INIT* C*/IN* Q31                        ;ADDITION

Q6  :=   Q5                                      ;SHIFT
     +   INIT                                    ;INITIALIZE

Q7  :=   Q6                                      ;SHIFT
     +   INIT                                    ;INITIALIZE
    :+: /INIT* C* IN*/Q31                        ;MODULO-2
     +  /INIT* C*/IN* Q31                        ;ADDITION


FUNCTION TABLE

CLK /OC INIT C IN Q31 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 CHK1

;                            Q
;                            3   QQQQQQQQ
;CLK   /OC   INIT   C   IN   1   76543210   CHK1
-------------------------------------------------
  C     L     H     X   X    X   HHHHHHHH    X
  C     L     L     H   L    H   LHLLHLLH    X
  C     L     L     H   L    H   LLHLLHLH    X
  C     L     L     H   L    H   HHHHHHLH    X
  C     L     L     H   L    H   LHLLHHLH    X
  C     L     L     H   L    H   LLHLHHLH    X
  C     L     L     H   L    H   HHHLHHLH    X
  C     L     L     H   L    L   HHLHHLHL    X
  C     L     L     H   L    L   HLHHLHLL    X
  C     L     L     H   L    L   LHHLHLLL    X
  C     L     L     H   L    H   LHHLLHHH    X
  C     L     L     H   L    L   HHLLHHHL    X
  C     L     L     H   L    L   HLLHHHLL    X
  C     L     L     H   L    H   HLLLHHHH    X
  C     L     L     H   L    H   HLHLHLLH    X
  C     L     L     H   L    H   HHHLLHLH    X
  C     L     L     H   L    H   LHHHHHLH    X
  C     L     L     H   L    L   HHHHHLHL    X
  C     L     L     H   L    L   HHHHLHLL    X
  C     L     L     H   L    L   HHHLHLLL    X
  C     L     L     H   L    L   HHLHLLLL    X
  C     L     L     H   L    L   HLHLLLLL    X
  C     L     L     H   L    L   LHLLLLLL    X
  C     L     L     H   L    L   HLLLLLLL    X
  C     L     L     H   L    L   LLLLLLLL    X
  C     L     L     H   L    H   HLHHLHHH    X
  C     L     L     H   L    L   LHHLHHHL    X
  C     L     L     H   L    H   LHHLHLHH    X
  C     L     L     H   L    H   LHHLLLLH    X
  C     L     L     H   L    L   HHLLLLHL    X
  C     L     L     H   L    H   LLHHLLHH    X
  C     L     L     H   L    L   LHHLLHHL    X
  C     L     L     H   L    H   LHHHHLHH    H
-------------------------------------------------


DESCRIPTION

FIRST 8-BIT SHIFT REGISTER AND CHECK.