PAL20X10 PAL DESIGN SPECIFICATION P7008 (PMSI405) BIRKNER/COLI 07/19/81 9-BIT REGISTER MMI SUNNYVALE, CALIFORNIA CLK D0 D1 D2 D3 D4 D5 D6 D7 D8 /LD GND /OC NC Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 VCC /Q0 := /Q0*/LD ;HOLD Q0 + /D0* LD ;LOAD D0 /Q1 := /Q1*/LD ;HOLD Q1 + /D1* LD ;LOAD D1 /Q2 := /Q2*/LD ;HOLD Q2 + /D2* LD ;LOAD D2 /Q3 := /Q3*/LD ;HOLD Q3 + /D3* LD ;LOAD D3 /Q4 := /Q4*/LD ;HOLD Q4 + /D4* LD ;LOAD D4 /Q5 := /Q5*/LD ;HOLD Q5 + /D5* LD ;LOAD D5 /Q6 := /Q6*/LD ;HOLD Q6 + /D6* LD ;LOAD D6 /Q7 := /Q7*/LD ;HOLD Q7 + /D7* LD ;LOAD D7 /Q8 := /Q8*/LD ;HOLD Q8 + /D8* LD ;LOAD D8 FUNCTION TABLE /OC CLK /LD D8 D7 D6 D5 D4 D3 D2 D1 D0 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ;/ C / DATA IN DATA OUT ;O L L DDDDDDDDD QQQQQQQQQ ;C K D 876543210 876543210 COMMENT ---------------------------------------------------------- L C L LLLLLLLLL LLLLLLLLL LOAD ALL ZEROS L C H XXXXXXXXX LLLLLLLLL HOLD ALL ZEROS L C L HHHHHHHHH HHHHHHHHH LOAD ALL ONES L C H XXXXXXXXX HHHHHHHHH HOLD ALL ONES L C L LHLHLHLHL LHLHLHLHL LOAD EVEN CHECKERBOARD L C H XXXXXXXXX LHLHLHLHL HOLD EVEN CHECKERBOARD L C L HLHLHLHLH HLHLHLHLH LOAD ODD CHECKERBOARD L C H XXXXXXXXX HLHLHLHLH HOLD ODD CHECKERBOARD H X X XXXXXXXXX ZZZZZZZZZ TEST HI-Z ---------------------------------------------------------- DESCRIPTION THIS 9-BIT REGISTER LOADS THE DATA (D8-D0) ON THE RISING EDGE OF THE CLOCK (CLK) IF THE LOAD LINE (/LD) IS ASSERTED (LOW ON PIN 11) AND OTHERWISE HOLDS THE ORIGINAL VALUE. THE 9-BIT ARCHITECTURE MAKES THIS REGISTER IDEAL FOR PARITY BUS INTERFACING IN MICROPROGRAMMED SYSTEMS. THESE OPERATIONS ARE EXERCISED IN THE FUNCTION TABLE AND SUMMARIZED IN OPERATIONS TABLE: /OC CLK /LD D8-D0 Q8-Q0 OPERATION ----------------------------------------- H X X X Z HI-Z L C H X Q HOLD L C L D D LOAD -----------------------------------------