PAL16R8 PAL DESIGN SPECIFICATION P7079 DANESH TAVANA 02/08/82 OCTAL ADDRESSABLE REGISTER WITH DEMULTIPLEXER/ENABLES MMI SUNNYVALE, CALIFORNIA CLK MODE /PR A B C E1 /E2 DIN GND /OC Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 VCC /Q0 := /PR* E1* E2*/DIN*/C*/B*/A* MODE ;LOAD /Q0 WITH /DIN (MODE=H) + /PR* E1* E2* /C*/B*/A*/MODE ;LOAD /Q0 WITH HIGH (MODE=L) + /PR* E1* E2*/Q0 * A* MODE ;/Q0 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q0 * B * MODE ;/Q0 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q0 * C * MODE ;/Q0 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q0 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q0 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q0 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q1 := /PR* E1* E2*/DIN*/C*/B* A* MODE ;LOAD /Q1 WITH /DIN (MODE=H) + /PR* E1* E2* /C*/B* A*/MODE ;LOAD /Q1 WITH HIGH (MODE=L) + /PR* E1* E2*/Q1 * /A* MODE ;/Q1 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q1 * B * MODE ;/Q1 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q1 * C * MODE ;/Q1 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q1 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q1 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q1 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q2 := /PR* E1* E2*/DIN*/C* B*/A* MODE ;LOAD /Q2 WITH /DIN (MODE=H) + /PR* E1* E2* /C* B*/A*/MODE ;LOAD /Q2 WITH HIGH (MODE=L) + /PR* E1* E2*/Q2 * A* MODE ;/Q2 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q2 * /B * MODE ;/Q2 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q2 * C * MODE ;/Q2 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q2 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q2 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q2 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q3 := /PR* E1* E2*/DIN*/C* B* A* MODE ;LOAD /Q3 WITH /DIN (MODE=H) + /PR* E1* E2* /C* B* A*/MODE ;LOAD /Q3 WITH HIGH (MODE=L) + /PR* E1* E2*/Q3 * /A* MODE ;/Q3 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q3 * /B * MODE ;/Q3 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q3 * C * MODE ;/Q3 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q3 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q3 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q3 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q4 := /PR* E1* E2*/DIN* C*/B*/A* MODE ;LOAD /Q4 WITH /DIN (MODE=H) + /PR* E1* E2* C*/B*/A*/MODE ;LOAD /Q4 WITH HIGH (MODE=L) + /PR* E1* E2*/Q4 * A* MODE ;/Q4 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q4 * B * MODE ;/Q4 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q4 */C * MODE ;/Q4 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q4 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q4 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q4 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q5 := /PR* E1* E2*/DIN* C*/B* A* MODE ;LOAD /Q5 WITH /DIN (MODE=H) + /PR* E1* E2* C*/B* A*/MODE ;LOAD /Q5 WITH HIGH (MODE=L) + /PR* E1* E2*/Q5 * /A* MODE ;/Q5 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q5 * B * MODE ;/Q5 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q5 */C * MODE ;/Q5 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q5 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q5 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q5 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q6 := /PR* E1* E2*/DIN* C* B*/A* MODE ;LOAD /Q6 WITH /DIN (MODE=H) + /PR* E1* E2* C* B*/A*/MODE ;LOAD /Q6 WITH HIGH (MODE=L) + /PR* E1* E2*/Q6 * A* MODE ;/Q6 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q6 * /B * MODE ;/Q6 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q6 */C * MODE ;/Q6 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q6 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q6 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q6 ;HOLD IF NOT LOADING (E1=L,/E2=L) /Q7 := /PR* E1* E2*/DIN* C* B* A* MODE ;LOAD /Q7 WITH /DIN (MODE=H) + /PR* E1* E2* C* B* A*/MODE ;LOAD /Q7 WITH HIGH (MODE=L) + /PR* E1* E2*/Q7 * /A* MODE ;/Q7 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q7 * /B * MODE ;/Q7 IS EITHER PREVIOUS STATE OR LOW + /PR* E1* E2*/Q7 */C * MODE ;/Q7 IS EITHER PREVIOUS STATE OR LOW + /PR* E1*/E2*/Q7 ;HOLD IF NOT LOADING (E1=H,/E2=H) + /PR*/E1*/E2*/Q7 ;HOLD IF NOT LOADING (E1=L,/E2=H) + /PR*/E1* E2*/Q7 ;HOLD IF NOT LOADING (E1=L,/E2=L) FUNCTION TABLE /OC CLK MODE /PR /E2 E1 C B A DIN Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 ;CONTROL FUNCTIONS INPUTS OUTPUTS ;/OC CLK MODE /PR /E2 E1 C B A DIN Q Q Q Q Q Q Q Q ; 7 6 5 4 3 2 1 0 COMMENTS ------------------------------------------------------------------------------- L C X L X X X X X X H H H H H H H H PRESET (OVERRD ENABLES) L C H H L H L L L L H H H H H H H L LOAD Q0 WITH DIN L C H H L H L L H L H H H H H H L L LOAD Q1 WITH DIN L C H H L H L H L L H H H H H L L L LOAD Q2 WITH DIN L C H H L H L H H L H H H H L L L L LOAD Q3 WITH DIN L C H H L H H L L L H H H L L L L L LOAD Q4 WITH DIN L C H H L H H L H L H H L L L L L L LOAD Q5 WITH DIN L C H H L H H H L L H L L L L L L L LOAD Q6 WITH DIN L C H H L H H H H L L L L L L L L L LOAD Q7 WITH DIN L C H H L H H H H H H L L L L L L L LOAD Q7 WITH DIN L C H H L H H H L H H H L L L L L L LOAD Q6 WITH DIN L C H H L H H L H H H H H L L L L L LOAD Q5 WITH DIN L C H H L H H L L H H H H H L L L L LOAD Q4 WITH DIN L C H H L H L H H H H H H H H L L L LOAD Q3 WITH DIN L C H H L H L H L H H H H H H H L L LOAD Q2 WITH DIN L C H H L H L L H H H H H H H H H L LOAD Q1 WITH DIN L C H H L H L L L H H H H H H H H H LOAD Q0 WITH DIN L C L H L H L L L X H H H H H H H L DECODE ADDRESS LINE 0 L C L H L H L L H X H H H H H H L H DECODE ADDRESS LINE 1 L C L H L H L H L X H H H H H L H H DECODE ADDRESS LINE 2 L C L H L H L H H X H H H H L H H H DECODE ADDRESS LINE 3 L C L H L H H L L X H H H L H H H H DECODE ADDRESS LINE 4 L C L H L H H L H X H H L H H H H H DECODE ADDRESS LINE 5 L C L H L H H H L X H L H H H H H H DECODE ADDRESS LINE 6 L C L H L H H H H X L H H H H H H H DECODE ADDRESS LINE 7 L C X H L L X X X X L H H H H H H H HOLD PREVIOUS STATE L C H H L H H L H L L H L H H H H H LOAD Q5 WITH DIN L C X H H L X X X X L H L H H H H H HOLD PREVIOUS STATE L C H H L H L H H L L H L H L H H H LOAD Q3 WITH DIN L C X H H H X X X X L H L H L H H H HOLD PREVIOUS STATE L C L H L H L L H X H H H H H H L H DECODE ADDRESS LINE 1 H X X X X X X X X X Z Z Z Z Z Z Z Z HI-Z ------------------------------------------------------------------------------ DESCRIPTION THE 8-BIT ADDRESSABLE REGISTER AND DEMULTIPLEXER PERFORMS TWO FUNCTIONS ON ONE MSI PACKAGE. IF MODE=0 THE PART PERFORMS A 3 TO 8 DE-MULTIPLEXER FUNCTION WITH PRESET, LOAD, AND HOLD; IF MODE=1 IT IS AN 8-BIT ADRESSABLE REGISTER WITH PRESET, LOAD, AND HOLD. WHEN THE CONTROL PINS (/E2,E1) ARE (LOW,HIGH) THE UNIT IS ENABLED AND THE INPUT ADDRESS PINS (C,B,A) EITHER CHANNEL THE INPUT DATA (DIN) TO ITS APPROPRIATE OUTPUT REGISTER (Q) WITH MODE=1, OR SELECT THE ADDRESSED OUTPUT REGISTER (Q) WITH MODE=0. ANY OTHER COMBINATION FOR THE INPUT CONTROL PINS HOLDS THE PREVIOUS STATE OF THE OUTPUTS. PRESET OVERRIDES ENABLE. THESE FUNCTIONS ARE EXERCISED IN THE FUNCTION TABLE AND SUMMARIZED IN THE OPERATIONS TABLE: /OC CLK MODE /PR /E2 E1 C B A DIN Q7-Q0 OPERATION ------------------------------------------------------------------- H X X X X X X X X X Z HI-Z L C X L X X X X X X H PRESET L C L H L H C B A X MUX ADDRESSED OUTPUT=LOW L C H H L H C B A D REG ADDRESSED OUTPUT=D L C X H H L X X X X Q HOLD L C X H L L X X X X Q HOLD L C X H H H X X X X Q HOLD -------------------------------------------------------------------