PAL16R6 PAL DESIGN SPECIFICATION P7067 VINCENT COLI 01/04/82 MULTIFUNCTION 6-BIT REGISTER MMI SUNNYVALE, CALIFORNIA CLK /LD D0 D1 D2 D3 D4 D5 POL GND /OC /PR Q5 Q4 Q3 Q2 Q1 Q0 /CLR VCC /Q0 := CLR ;CLEAR + /CLR*/PR*/LD*/Q0 ;HOLD + /CLR*/PR* LD* POL*/D0 ;LOAD D0 (TRUE) + /CLR*/PR* LD*/POL* D0 ;LOAD /D0 (COMP) /Q1 := CLR ;CLEAR + /CLR*/PR*/LD*/Q1 ;HOLD + /CLR*/PR* LD* POL*/D1 ;LOAD D1 (TRUE) + /CLR*/PR* LD*/POL* D1 ;LOAD /D1 (COMP) /Q2 := CLR ;CLEAR + /CLR*/PR*/LD*/Q2 ;HOLD + /CLR*/PR* LD* POL*/D2 ;LOAD D2 (TRUE) + /CLR*/PR* LD*/POL* D2 ;LOAD /D2 (COMP) /Q3 := CLR ;CLEAR + /CLR*/PR*/LD*/Q3 ;HOLD + /CLR*/PR* LD* POL*/D3 ;LOAD D3 (TRUE) + /CLR*/PR* LD*/POL* D3 ;LOAD /D3 (COMP) /Q4 := CLR ;CLEAR + /CLR*/PR*/LD*/Q4 ;HOLD + /CLR*/PR* LD* POL*/D4 ;LOAD D4 (TRUE) + /CLR*/PR* LD*/POL* D4 ;LOAD /D4 (COMP) /Q5 := CLR ;CLEAR + /CLR*/PR*/LD*/Q5 ;HOLD + /CLR*/PR* LD* POL*/D5 ;LOAD D5 (TRUE) + /CLR*/PR* LD*/POL* D5 ;LOAD /D5 (COMP) FUNCTION TABLE D5 D4 D3 D2 D1 D0 /CLR /PR /LD POL CLK /OC Q5 Q4 Q3 Q2 Q1 Q0 ; INPUTS CONTROL OUTPUTS COMMENTS ; D5--D0 /CLR /PR /LD POL CLK /OC Q5--Q0 ---------------------------------------------------------------------------- ;CLEAR AND PRESET TESTS HHHHHH L L L H C L LLLLLL CLEAR (OVERRIDES PRESET/LOAD) LLLLLL H L L H C L HHHHHH PRESET (OVERRIDES LOAD) LLLLLL L L L L C L LLLLLL CLEAR (POL=L) HHHHHH H L L L C L HHHHHH PRESET (POL=L) ;LOAD DATA - WALKING ZEROES (TRUE DATA) HHHHHL H H L H C L HHHHHL LOAD HEX(FE) HHHHLH H H L H C L HHHHLH LOAD HEX(FD) HHHLHH H H L H C L HHHLHH LOAD HEX(FB) HHLHHH H H L H C L HHLHHH LOAD HEX(F7) HLHHHH H H L H C L HLHHHH LOAD HEX(EF) LHHHHH H H L H C L LHHHHH LOAD HEX(DF) HHHHHH H H L H C L HHHHHH LOAD HEX(3F) ;LOAD DATA - WALKING ONES (TRUE DATA) LLLLLH H H L H C L LLLLLH LOAD HEX(01) LLLLHL H H L H C L LLLLHL LOAD HEX(02) LLLHLL H H L H C L LLLHLL LOAD HEX(04) LLHLLL H H L H C L LLHLLL LOAD HEX(08) LHLLLL H H L H C L LHLLLL LOAD HEX(10) HLLLLL H H L H C L HLLLLL LOAD HEX(20) LLLLLL H H L H C L LLLLLL LOAD HEX(00) ;LOAD DATA - WALKING ONES (COMP DATA) WITH HOLD TESTS LLLLLL H H H L C L LLLLLL HOLD LLLLLL H H L L C L HHHHHH LOAD HEX(00) (COMP) LLLLLL H H H H C L HHHHHH HOLD LLLLLH H H L L C L HHHHHL LOAD HEX(01) (COMP) LLLLLL H H H L C L HHHHHL HOLD LLLLHL H H L L C L HHHHLH LOAD HEX(02) (COMP) HHHHHH H H H H C L HHHHLH HOLD LLLHLL H H L L C L HHHLHH LOAD HEX(04) (COMP) LLLLLL H H H L C L HHHLHH HOLD LLHLLL H H L L C L HHLHHH LOAD HEX(08) (COMP) HHHHHH H H H H C L HHLHHH HOLD LHLLLL H H L L C L HLHHHH LOAD HEX(10) (COMP) LLLLLL H H H L C L HLHHHH HOLD HLLLLL H H L L C L LHHHHH LOAD HEX(20) (COMP) HHHHHH H H H H C L LHHHHH HOLD LLLLLL H H L L C L HHHHHH LOAD HEX(00) (COMP) XXXXXX X X X X X H ZZZZZZ TEST HI-Z -------------------------------------------------------------------------- DESCRIPTION THIS IS AN 6-BIT SYNCHRONOUS REGISTER WITH PARALLEL LOAD, LOAD COMPLEMENT, PRESET, CLEAR, AND HOLD CAPABILITIES. FOUR CONTROL INPUTS (/LD,POL,/CLR,/PR) PROVIDE ONE OF FOUR OPERATIONS WHICH OCCUR SYNCHRONOUSLY WITH THE CLOCK (CLK). THE LOAD OPERATION LOADS THE INPUTS (D5-D0) INTO THE OUTPUT REGISTER (Q5-Q0), WHEN POL=H OR LOADS THE COMPLEMENT OF THE INPUTS WHEN POL=L. THE CLEAR (/CLR) OPERATION RESETS THE OUTPUT REGISTERS TO ALL LOWS. THE PRESET (/PR) OPERATION PRESETS THE OUTPUT REGISTERS TO ALL HIGHS. THE HOLD OPERATION HOLDS THE PREVIOUS VALUE REGARDLESS OF CLOCK TRANSITIONS. CLEAR OVERRIDES PRESET, PRESET OVERRIDES LOAD, AND LOAD OVERRIDES HOLD. THESE OPERATIONS ARE EXERCISED IN THE FUNCTION TABLE AND SUMMARIZED IN THE OPERATIONS TABLE: /OC CLK /CLR /PR /LD POL D5-D0 Q5-Q0 OPERATION --------------------------------------------------------- H X X X X X X Z HI-Z L C L X X X X L CLEAR L C H L L X X H PRESET L C H H H X X Q HOLD L C H H L H D D LOAD TRUE L C H H L L D /D LOAD COMP ---------------------------------------------------------