COMM86ֈASM86 VER V3.0MAIN86EX8586??SEGۘ 8 N k 2COMM86ؒ ACKFLG ADDRESS_THE_PACKET APPEND_CRC AUTOINIT_CHECK~ BAD_RECEIVE BAD_TRANSMIT BAD_VERIFY= BASE_8259 BIT_LOOP_32~ BLOCK_MOVE  BYTE_LOOP_328 CH_1_AVAILg CH_2_AVAILe CH_3_AVAILc CH0_ADDR_8237"CH0_COUNT_8237 CH1_ADDR_8237 CH1_AUTOINIT_ADDR{ CH1_COUNT_8237 CH2_ADDR_8237CH2_COUNT_8237 CH3_ADDR_8237CH3_COUNT_8237 CHECK_DEST CHECK_FOR_RCVܒ CHECK_FOR_RCV_INT CHECK_RCVْ CLR_REQ CNT_0_8253ے CNT_1_8253ْ CNT_2_8253ג CNTL_8255  COMM_RUN3 COMMAND_8237R COPYRT CORRECT_RECEIVE~ CRC_31 CRC_32L DESIRABLE_PACKET. DESTINATION_ADDRESSGF DIAG_PACKET_TYPEВDIAG_TEST_PACKETP)DIAGNOSTIC_MULTICASTM DMA1&3 DMA2'1 DMA3(/ DRAM_SYS_LOCݒ DUNFLGECHO_CMD ECHO_REPLY = END_BIT_LOOP_32!EOI_CMD & ERRFLG ETHERIDS)ɒETHERNETADDRESSLENGTH  EXAMINE_PACKETX EXBLK2 EXECUTE_FIRMWAREKv EXITqEXTRAPOSTPACKETBYTES-EXTRAPREPACKETBYTES FAILAFALSE FILL_PACKETO FILL_PACKET_EXITw= FIND_CORRECT_ADDRESS FIND_JUMP_TABLE4ے FIND_SELF_ADDRESS GOT_TABLEJ HOLD_UP  I_TRANSMIT # IDLE_VECTORG INIT_8237_VERIFY8 INIT_8237_XMT INIT_8259{ INIT_CHIPSu INIT_INTERRUPT_VEC INIT_RCV_CNTB INIT_XMT_SYNC  INIT_XMT_SYNC_PACKETS ݒ INITIALIZE_RECEIVE> INITIALIZE_SYNC_PACKETS y INITIATE_RCVL INSERT_DEST_ADDR INSERT_SRC_ADDR INT_0? INT_0_FLAG INT_0_TEST INT_1T֒ INT_1_FLAG INT_1_FLAG_CHECK, INT_1_TEST INT_2i INT_2_FLAG INT_2_FLAG_CHECK@ INT_2_TEST INT_3~ INT_3_FLAG INT_3_TEST q INT_4 INT_4_FLAG INT_4_TEST_ INT_4_TEST_EXIT/ INT_5 INT_5_FLAG INT_5_TEST=? INT_6w INT_6_FLAG INT_6_TESTO, INT_7f INT_7_FLAG INT_7_TESTa INT_VECTORS" INT_WAITm INTEL_NET_IDPM INTERRUPTI JUMP_TBL6 JUMP_TBL_PTRݒ LEAVE_PROCEDURENʒ LISTENl LOOP_FOR_RCV_SYNC MARCHv MARCH_ERRORh MARCH_LOOPӒ MASK_8237$ MASK_8259 MB_INT_MASK MBUS_SYS_LOCڒMINIMUM_LENGTH<ϒMINIMUM_LENGTH_RECEIVECV MIRROR MIRROR_BYTE| MIRROR_CRC MODE_8237/ MODE_8253) MODE_8255b MOVE_RCV_DATA_TO_HOST+ MYSTACKSݒ NEXT_BYTE NO_CS_LOOPr NO_REQ: PAϒ PACKET_DATA_ADDRESS PACKET_DATA_LENGTH PACKETS_RECEIVEDn PACKETS_TRANSMITTEDb PASS% PB͒ PC˒ POLL_8259_CMD  PORT_A_8255V PORT_B_8255T PORT_C_8255R PREPARE_EXITՒ PREPARE_RCVL PROC_OFFSETA PROC_SEGMENT PROMISC_CHECK) PROMISC_PACKET  RANDOM_VERIFY RAX RBP RBXRCV_0_BLOCK_STARTRCV_1_BLOCK_STARTRCV_2_BLOCK_STARTRCV_ACK< RCV_BLOCKSIZET RCV_CH1_ADDR RCV_CH2_ADDR RCV_CH3_ADDR RCV_CHECK_EXIT RCV_CS_WAIT RCV_EXIT RCV_FLAG_CHECKK" RCV_FLAG_RESETeRCV_ID RCV_INT_0 RCV_INT_1% RCV_INT_22 RCV_INT_FLAG RCV_INT_WAIT RCV_LEN_82371 RCV_MDS_ADDRESS RCV_MDS_DATA RCV_MDS_LENGTH RCV_OCCURRED  RCV_PACKET_LENGTHt RCV_PACKET_SRAM_LOCĒ RCV_SYNCc  RCV_SYNC_ATTEMPT RCV_TESTe RCX RDI RDSy RDX| READ_ADDRESS. RECEIVE_ONLYQ  REQUEST_8237' RESv RESET RESET_8237͒ RESET_CH_CNTRA RESET_ERRS- RESET_FOR_XMTx RESET_JUMPRESET_MBUS_INTU RESET_TXSTART- RESET_VECTORܒ RESP_CONTROLLERS+ RESTORE_REGSђ RETRY_XMT_SYNC F RSIz RUN_TESTj SAV_STATUS SELECT_TEST 0 SELF_ADDRESSED  SEND SEND_PACKET SERDES_MODE\ SET_EXTERNAL_IOc SET_INTERNAL_IOZ SET_MBUS_INT SET_TXSTARTɒ SET_UP_CH1_2_3_RCV~ SLOW_DOWN 2 SLOW_DOWN_AGAIN  SLOW_DOWN_XACK ? SOURCE_COMMM SPECIFIC_CHECK=O SPECIFIC_PACKET Ғ STANDARD_VERIFYp START_RCV STATION_SYNC;  STATUS_8237o STKTOPؒ SYNC_EXIT  SYNC_PACKET_CHECKgSYNC_PACKET_LENGTHC TBL_FOUND TBL_OFFSET TBL_PTR_OFFSETN TBL_PTR_SEG: TBL_SEGMENTW TEMP_8237 TEST_NUMBER@ TEST_RCV_FLAG TRANSMITY TRANSMIT_ACKw y TRANSMIT_AND_RCV_ACK F TRANSMIT_EXITՒ TRANSMIT_MODEM TRANSMIT_ONLYA 9 TRUE TSTNUM TSTTBLn UNWANTED_PACKETX UPDATE_8237 UPDATE_COUNTER: UTILITYa UTILTBLTْ VERIFYP{ VERIFY_OKO} WAIT_FOR_INT_0q WAIT_FOR_INT_1^ WAIT_FOR_INT_2K WAIT_FOR_INT_37 WAIT_FOR_INT_4$ WAIT_FOR_INT_54 WAIT_FOR_INT_6F WAIT_FOR_INT_7Xߒ WAIT_FOR_INT_REQj WAIT_FOR_RCV WAIT_FOR_RCV_SYNC:! WAIT_FOR_VERIFY_COMPLETE>ג WAKE_UP WAKE_UP_PORT\ WASTE_20_SEC WASTE_20_SECONDSO WASTE_LOOPXMT_ACK,XMT_ACK_PACKET<XMT_BLOCK_START~XMT_CMD XMT_CS_WAIT XMT_DEST_ADDR0XMT_IDo XMT_ID_PACKET6 XMT_MDS_ADDRESS XMT_MDS_DATA XMT_MDS_LENGTHߒ XMT_PACKETXMT_RCV_ACK_PACKETXMT_RCV_ID_PACKETxl XMT_SRC_ADDRt XMT_SYNC Q XMT_SYNC_ATTEMPT XMT_TYPE  XMTTING PC͐ PBϐ PAѐ SERDES_MODE^ TEST_NUMBERB STATION_SYNC;  MOVE_RCV_DATA_TO_HOST+ EXAMINE_PACKETZ CHECK_FOR_RCVސ PREPARE_RCVN PACKETS_RECEIVEDp PACKETS_TRANSMITTEDd CHECK_FOR_RCV_INT INSERT_DEST_ADDR RCV_FLAG_RESETg RCV_INT_WAIT WASTE_20_SECONDSQ EXECUTE_FIRMWAREKx FIND_JUMP_TABLE4ݐ MARCHx! WAIT_FOR_VERIFY_COMPLETE>ِ WAIT_FOR_INT_REQj CLR_REQ SET_UP_CH1_2_3_RCV INSERT_SRC_ADDR INITIALIZE_RECEIVE@ INIT_8237_VERIFY: INIT_8237_XMT XMT_PACKET SEND_PACKET TRANSMIT[ RESET_FOR_XMTx FILL_PACKETO  ADDRESS_THE_PACKET APPEND_CRC RANDOM_VERIFY VERIFYP} READ_ADDRESS. WAIT_FOR_INT_7X WAIT_FOR_INT_6F WAIT_FOR_INT_54 WAIT_FOR_INT_4& WAIT_FOR_INT_39 WAIT_FOR_INT_2M WAIT_FOR_INT_1` WAIT_FOR_INT_0s INIT_INTERRUPT_VEC SET_INTERNAL_IO\ SET_EXTERNAL_IOe RESTORE_REGSӐ SAV_STATUSÐ BLOCK_MOVE  INIT_CHIPSu INTERRUPTK RCV_INT_FLAG INT_7_FLAG INT_6_FLAG INT_5_FLAG INT_4_FLAG INT_3_FLAG INT_2_FLAG INT_1_FLAG INT_0_FLAG ETHERIDS)ː RESP_CONTROLLERS- RCV_CS_WAIT LISTENn BAD_RECEIVE BAD_TRANSMIT XMTTING XMT_CS_WAIT SEND BAD_VERIFY? SPECIFIC_PACKET Ԑ PROMISC_PACKET  SELF_ADDRESSED  I_TRANSMIT % RCV_MDS_LENGTH RCV_MDS_ADDRESS RCV_MDS_DATA XMT_MDS_LENGTH XMT_MDS_ADDRESS XMT_MDS_DATA WAKE_UP_PORT^ TRANSMIT_MODEO PACKET_DATA_LENGTH PACKET_DATA_ADDRESS TSTTBLp EXBLK4 ERRFLG $  u   A Q  \> "E ? T i ~      (c) intel corp 1981z 氌ӌټ ؎SQϋ>|. | 4 K <t]T]>u....PSQR3ҹ.uZY[XPSQR && ۉ>6ZY[XPػ3  Xˎˋ6>ˀ>t&˚u &. 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